A 2.5V 6.4mW 10-bit 140MS/s Digital-to-Analog Converter with Improved Current Mirror
نویسندگان
چکیده
A 10-bit 140MS/s digital-to-analog converter (DAC) with improved current mirror is presented. In order to improve the resolusion of a 10-bit DAC, a segmented decoding plus R-2R architecture will be introduced. DAC system modeling shows that the dynamic performance of the DAC is strongly dependent on the output impedance of DAC current source. The gain-boosting technique is applied to increase the output impedance of DAC current sources. It has been fabricated in a CMOS 0.35um 2P4M technology and the chip area with PADs is 0.996×1 mm. The measured differential nonlinearity and integral nonlinearity of the DAC are ±0.8 LSB and ±0.8 LSB, respectively. The power dissipation is 6.4mW under 140MS/s clock rate at 2.5V supply voltage. Key-Words: DAC, segmented decoding structure, R-2R architecture, current mirror, low power
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